FDBL0065N40 Datasheet, PDF (1/6 Pages) Fairchild Semiconductor – N-Channel PowerTrench MOSFET

FDBL0065N40
N-Channel PowerTrench^® MOSFET
40 V, 300 A, 0.65 mΩ
November 2014
Features
„ Typical R_DS(on) = 0.5 mΩ at V_GS = 10V, I_D = 80 A
„ Typical Q_g(tot) = 220 nC at V_GS = 10V, I_D = 80 A
„ UIS Capability
„ RoHS Compliant
Applications
„ Industrial Motor Drive
„ Industrial Power Supply
„ Industrial Automation
„ Battery Operated tools
„ Battery Protection
„ Solar Inverters
„ UPS and Energy Inverters
„ Energy Storage
„ Load Switch
D
G
S
For current package drawing, please refer to the Fairchild web‐
site at https://www.fairchildsemi.com/evaluate/package‐spec‐
ifications/packageDetails.html?id=PN_PSOFA‐008
MOSFET Maximum Ratings T_J = 25°C unless otherwise noted.
Symbol
Parameter
V_DSS
V_GS
I_D
Drain-to-Source Voltage
Gate-to-Source Voltage
Drain Current - Continuous (V_GS=10) (Note 1)
Pulsed Drain Current
E_AS
Single Pulse Avalanche Energy
Power Dissipation
P_D
Derate Above 25^oC
T_J, T_STG Operating and Storage Temperature
R_θJC
Thermal Resistance, Junction to Case
R_θJA
Maximum Thermal Resistance, Junction to Ambient
T_C = 25°C
T_C = 25°C
(Note 2)
(Note 3)
Ratings
40
±20
300
See Figure 4
1064
429
2.86
-55 to + 175
0.35
43
Units
V
V
A
mJ
W
W/^oC
o_C
o_C/W
o_C/W
Notes:
1: Current is limited by bondwire configuration.
2: Starting T_J = 25°C, L = 0.3mH, I_AS = 84A, V_DD = 40V during inductor charging and V_DD = 0V during time in avalanche.
3: R_θJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder
mounting surface
presented here is
of the
based
drain pins. R_θJC is
on mounting on a 1
guaranteed by design,
in² pad of 2oz copper.
while
R_θJAis
determined
by
the
board
design.
The maximum rating
Package Marking and Ordering Information
Device Marking
Device
Package
FDBL0065N40
FDBL0065N40
MO-299A
-
-
-
©2014 Fairchild Semiconductor Corporation
1
FDBL0065N40 Rev.C3
www.fairchildsemi.com