FAN1654 Datasheet, PDF (1/7 Pages) Fairchild Semiconductor – 1.5A LDO, DDR Bus Termination Regulator

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FAN1654
1.5A LDO, DDR Bus Termination Regulator
Features
• Sinks and sources 1A continuous, 1.5A peak
• -40°C to +125°C Operating Range
• Load regulation: (VDDQ/2) ± 40mV
• 5mA VREF buffer tracks VTT
• On-chip thermal limiting
• Power-enhanced eTSSOP™-16 package
• Low Current Shutdown Mode
• Output Short Circuit Protection
Applications
• DDR terminators
Description
The FAN1654 is a low-cost bi-directional LDO specifically
designed for terminating DDR memory bus. It can both sink
and source up to 1A continuous, 1.5A peak, providing
enough current for most DDR applications. Load regulation
meets the JEDEC spec, VTT = (VDDQ/2) ± 40mV.
The FAN1654 includes a buffered reference voltage capable
of supplying up to 5mA current. On-chip thermal limiting
provides protection against a combination of power overload
and ambient temperature that would create an excessive
junction temperature. A shutdown input puts the FAN1654
into a low power mode for laptop computer applications.
The FAN1654 regulator is available in a power-enhanced
eTSSOP™-16 package, and the standard SOIC-14
Block Diagram
VDDQ
VDD
VDD VDD _SHDN
VREFOUT
VREFIN
200k
-
+
+
200k
FAN1655
VSSQ
-
VSS VSS VSS
VTTFORCE
VTTFORCE
VTTSENSE
REV. 1.0.5 4/17/02