DM74S40 Datasheet, PDF (1/3 Pages) Fairchild Semiconductor – Dual 4-Input NAND Buffer

August 1986
Revised April 2000
DM74S40
Dual 4-Input NAND Buffer
General Description
This device contains two independent gates each of which
performs the logic NAND function.
Ordering Code:
Order Number Package Number
Package Description
DM74S40N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
Function Table
Y = ABCD
Inputs
A
B
C
D
X
X
X
L
X
X
L
X
X
L
X
X
L
X
X
X
H
H
H
H
H = HIGH Logic Level
L = LOW Logic Level
X = Either LOW or HIGH Logic Level
Output
Y
H
H
H
H
L
© 2000 Fairchild Semiconductor Corporation DS006453
www.fairchildsemi.com