DM74S11 Datasheet, PDF (1/3 Pages) Fairchild Semiconductor – Triple 3-Input AND Gate

August 1986
Revised April 2000
DM74S11
Triple 3-Input AND Gate
General Description
This device contains three independent gates each of
which performs the logic AND function.
Ordering Code:
Order Number Package Number
Package Description
DM74S11N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
Function Table
Y = ABC
Inputs
A
B
C
X
X
L
X
L
X
L
X
X
H
H
H
H = HIGH Logic Level
L = LOW Logic Level
X = Either LOW or HIGH Logic Level
Output
Y
L
L
L
H
© 2000 Fairchild Semiconductor Corporation DS006447
www.fairchildsemi.com