DM74LS153 Datasheet, PDF (1/5 Pages) Fairchild Semiconductor – Dual 1-of-4 Line Data Selectors/Multiplexers

August 1986
Revised March 2000
DM74LS153
Dual 1-of-4 Line Data Selectors/Multiplexers
General Description
Each of these data selectors/multiplexers contains invert-
ers and drivers to supply fully complementary, on-chip,
binary decoding data selection to the AND-OR-invert
gates. Separate strobe inputs are provided for each of the
two four-line sections.
Features
s Permits multiplexing from N lines to 1 line
s Performs at parallel-to-serial conversion
s Strobe (enable) line provided for cascading
(N lines to n lines)
s High fan-out, low impedance, totem pole outputs
s Typical average propagation delay times
From data 14 ns
From strobe 19 ns
From select 22 ns
s Typical power dissipation 31 mW
Ordering Code:
Order Number Package Number
Package Description
DM74LS153M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS153N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Select
Inputs
Data Inputs
Strobe
B A C0 C1 C2 C3
G
XX X X X X
H
LL L X X X
L
LL H X X X
L
LH X L X X
L
LH X H X X
L
HL X X L X
L
HL X X H X
L
HH X X X L
L
HH X X X H
L
Select inputs A and B are common to both sections.
H = HIGH Level
L = LOW Level
X = Don't Care
Output
Y
L
L
H
L
H
L
H
L
H
© 2000 Fairchild Semiconductor Corporation DS006393
www.fairchildsemi.com