DM74AS10 Datasheet, PDF (1/4 Pages) Fairchild Semiconductor – Triple 3-Input NAND Gate

April 1984
Revised March 2000
DM74AS10
Triple 3-Input NAND Gate
General Description
This device contains three independent gates, each of
which performs the logic NAND function.
Features
s Switching specifications at 50 pF
s Switching specifications guaranteed over full
temperature and V_CC range
s Advanced oxide-isolated, ion-implanted Schottky
TTL process
s Functionally and pin for pin compatible with Schottky,
low power Schottky, and advanced low power Schottky
TTL counterpart
s Improved AC performance over Schottky, low power
Schottky, and advanced low power Schottky counter-
parts
Ordering Code:
Order Number Package Number
Package Description
DM74AS10M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74AS10N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Y = ABC
Inputs
A
B
C
X
X
L
X
L
X
L
X
X
H
H
H
H = HIGH Logic Level
L = LOW Logic Level
X = Either LOW or HIGH Logic Level
Output
Y
H
H
H
L
© 2000 Fairchild Semiconductor Corporation DS006274
www.fairchildsemi.com