DM7426 Datasheet, PDF (1/3 Pages) Fairchild Semiconductor – Quad 2-Input NAND Gates with High Voltage Open-Collector Outputs

August 1986
Revised February 2000
DM7426
Quad 2-Input NAND Gates with
High Voltage Open-Collector Outputs
General Description
This device contains four independent gates each of which
performs the logic NAND function. The open-collector out-
puts require external pull-up resistors for proper logical
operation.
Pull-Up Resistor Equations
Where:
N₁ (I_OH) = total maximum output high current
for all outputs tied to pull-up resistor
N₂ (I_IH) = total maximum input high current for
all inputs tied to pull-up resistor
N₃ (I_IL) = total maximum input low current for
all inputs tied to pull-up resistor
Ordering Code:
Order Number Package Number
Package Description
DM7426N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
Function Table
Y = AB
Inputs
A
B
L
L
L
H
H
L
H
H
H = HIGH Logic Level
L = LOW Logic Level
Output
Y
H
H
H
L
© 2000 Fairchild Semiconductor Corporation DS006508
www.fairchildsemi.com