CD4030C Datasheet, PDF (1/5 Pages) Fairchild Semiconductor – Quad EXCLUSIVE-OR Gate

October 1987
Revised January 1999
CD4030C
Quad EXCLUSIVE-OR Gate
General Description
The CD4030C EXCLUSIVE-OR gates are monolithic com-
plementary MOS (CMOS) integrated circuits constructed
with N- and P-channel enhancement mode transistors. All
inputs are protected against static discharge with diodes to
V_DD and V_SS.
Features
s Wide supply voltage range:
s Low power: 100 nW (typ.)
s Medium speed operation:
3.0V to 15V
t_PHL = t_PLH = 40 ns (typ.) at C_L = 15 pF, 10V supply
s High noise immunity 0.45 V_CC (typ.)
Applications
• Automotive
• Data terminals
• Instrumentation
• Medical electronics
• Industrial controls
• Remote metering
• Computers
Ordering Code:
Order Number Package Number
Package Description
CD4030CSJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4030CN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Truth Table
Pin Assignments for DIP and SOP
A
B
J
0
0
0
1
0
1
0
1
1
1
1
0
1 = HIGH Level
0 = LOW Level
© 1999 Fairchild Semiconductor Corporation DS005961.prf
www.fairchildsemi.com