CD4010C Datasheet, PDF (1/5 Pages) Fairchild Semiconductor – Hex Buffers (Non-Inverting)

October 1987
Revised June 2000
CD4010C
Hex Buffers (Non-Inverting)
General Description
The CD4010C hex buffers are monolithic complementary
MOS (CMOS) integrated circuits. The N- and P-channel
enhancement mode transistors provide a symmetrical cir-
cuit with output swings essentially equal to the supply volt-
age. This results in high noise immunity over a wide supply
voltage range. No DC power other than that caused by
leakage current is consumed during static conditions. All
inputs are protected against static discharge. These gates
may be used as hex buffers, CMOS to DTL or TTL inter-
face or as CMOS current drivers. Conversion ranges are
from 3V to 15V providing V_CC ≤ V_DD. The devices also
have buffered outputs which improve transfer characteris-
tics by providing very high gain.
Features
s Wide supply voltage range: 3.0V to 15V
s Low power: 100 nW (typ.)
s High noise immunity: 0.45 V_DD (typ.)
s High current sinking: 8 mA (min.) at V_O = 0.5V
capability: and V_DD = 10V
Applications
• Automotive
• Data terminals
• Instrumentation
• Medical electronics
• Alarm system
• Industrial controls
• Remote metering
• Computers
Ordering Code:
Order Number Package Number
Package Description
CD4010CM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
CD4010CN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Schematic Diagram
Pin Assignments for DIP and SOIC
Top View
Hex COS/MOS to DTL or TTL
converter (inverting).
Connect V_CC to DTL or TTL supply.
Connect V_DD to COS/MOS supply.
© 2000 Fairchild Semiconductor Corporation DS005945
www.fairchildsemi.com