BSS84 Datasheet, PDF (1/5 Pages) NXP Semiconductors – P-channel enhancement mode vertical D-MOS transistor

July 2002
BSS84
P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode field effect
transistors are produced using Fairchild’s proprietary,
high cell density, DMOS technology. This very high
density process has been designed to minimize on-
state resistance, provide rugged and reliable
performance and fast switching. They can be used, with
a minimum of effort, in most applications requiring up to
0.13A DC and can deliver current up to 0.52A.
This product is particularly suited to low voltage
applications requiring a low current high side switch.
Features
• −0.13A, −50V. RDS(ON) = 10Ω @ VGS = −5 V
• Voltage controlled p-channel small signal switch
• High density cell design for low RDS(ON)
• High saturation current
D
D
SOT-23
S
G
Absolute Maximum Ratings TA=25^oC unless otherwise noted
Symbol
VDSS
VGSS
ID
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
(Note 1)
PD
TJ, TSTG
TL
Maximum Power Dissipation
(Note 1)
Derate Above 25°C
Operating and Storage Junction Temperature Range
Maximum Lead Temperature for Soldering
Purposes, 1/16” from Case for 10 Seconds
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
SP
BSS84
7’’
G
S
Ratings
−50
±20
−0.13
−0.52
0.36
2.9
−55 to +150
300
350
Tape width
8mm
Units
V
V
A
W
mW/°C
°C
°C/W
Quantity
3000 units
2002 Fairchild Semiconductor Corporation
BSS84 Rev B(W)