BSS138_NL Datasheet, PDF (1/5 Pages) Fairchild Semiconductor – N-Channel Logic Level Enhancement Mode Field Effect Transistor

October 2005
BSS138
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode field effect
transistors are produced using Fairchild’s proprietary,
high cell density, DMOS technology. These products
have been designed to minimize on-state resistance
while provide rugged, reliable, and fast switching
performance.These products are particularly suited for
low voltage, low current applications such as small
servo motor control, power MOSFET gate drivers, and
other switching applications.
Features
• 0.22 A, 50 V. RDS(ON) = 3.5Ω @ VGS = 10 V
RDS(ON) = 6.0Ω @ VGS = 4.5 V
• High density cell design for extremely low RDS(ON)
• Rugged and Reliable
• Compact industry standard SOT-23 surface mount
package
D
D
SOT-23
S
G
Absolute Maximum Ratings TA=25^oC unless otherwise noted
Symbol
VDSS
VGSS
ID
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
(Note 1)
PD
TJ, TSTG
TL
Maximum Power Dissipation
(Note 1)
Derate Above 25°C
Operating and Storage Junction Temperature Range
Maximum Lead Temperature for Soldering
Purposes, 1/16” from Case for 10 Seconds
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
SS
BSS138
7’’
G
S
Ratings
50
±20
0.22
0.88
0.36
2.8
−55 to +150
300
350
Tape width
8mm
Units
V
V
A
W
mW/°C
°C
°C
°C/W
Quantity
3000 units
2005 Fairchild Semiconductor Corporation
BSS138 Rev C(W)