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BSS123 Datasheet, PDF (1/5 Pages) NXP Semiconductors – N-channel enhancement mode vertical D-MOS transistor | |||
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June 2003
BSS123
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode field effect
transistors are produced using Fairchildâs proprietary,
high cell density, DMOS technology. These products
have been designed to minimize on-state resistance
while provide rugged, reliable, and fast switching
performance.These products are particularly suited for
low voltage, low current applications such as small
servo motor control, power MOSFET gate drivers, and
other switching applications.
Features
⢠0.17 A, 100 V. RDS(ON) = 6⦠@ VGS = 10 V
RDS(ON) = 10⦠@ VGS = 4.5 V
⢠High density cell design for extremely low RDS(ON)
⢠Rugged and Reliable
⢠Compact industry standard SOT-23 surface mount
package
D
D
SOT-23
S
G
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
VDSS
VGSS
ID
Drain-Source Voltage
Gate-Source Voltage
Drain Current â Continuous
â Pulsed
(Note 1)
PD
Maximum Power Dissipation
Derate Above 25°C
(Note 1)
TJ, TSTG
TL
Operating and Storage Junction Temperature Range
Maximum Lead Temperature for Soldering
Purposes, 1/16â from Case for 10 Seconds
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
SA
BSS123
7ââ
G
S
Ratings
100
±20
0.17
0.68
0.36
2.8
â55 to +150
300
350
Tape width
8mm
Units
V
V
A
W
mW/°C
°C
°C/W
Quantity
3000 units
©2003 Fairchild Semiconductor Corporation
BSS123 Rev G(W)
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