BSS100 Datasheet, PDF (1/10 Pages) Siemens Semiconductor Group – SIPMOS Small-Signal Transistor (N channel Enhancement mode Logic Level)

September 1996
BSS100 / BSS123
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These N-Channel logic level enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process has been especially tailored to
minimize on-state resistance, provide superior switching
performance. This product is particularly suited to low
voltage, low current applications, such as small servo
motor controls, power MOSFET gate drivers, and other
switching applications.
Features
BSS100: 0.22A, 100V. R_DS(ON) = 6Ω @ V_GS = 10V.
BSS123: 0.17A, 100V. R_DS(ON) = 6Ω @ V_GS = 10V
High density cell design for extremely low R_DS(ON).
Voltage controlled small signal switch.
Rugged and reliable.
_______________________________________________________________________________
D
BSS100
BSS123
G
S
Absolute Maximum Ratings T_A = 25°C unless otherwise noted
Symbol Parameter
BSS100
V_DSS
Drain-Source Voltage
V_DGR
Drain-Gate Voltage (R_GS < 20KΩ)
V_GSS
Gate-Source Voltage - Continuous
- Non Repetitive (T_P < 50 µS)
I_D
Drain Current - Continuous
0.22
- Pulsed
0.9
P_D
Total Power Dissipation @ T_A = 25°C
0.63
T_J,T_STG Operating and Storage Temperature Range
T_L
Maximum Lead Temperature for Soldering
Purposes, 1/16" from Case for 10 Seconds
THERMAL CHARACTERISTICS
R_θJA
Thermal Resistacne, Junction-to-Ambient
200
© 1997 Fairchild Semiconductor Corporation
100
100
± 14
± 20
-55 to 150
300
BSS123
0.17
0.68
0.36
Units
V
V
V
A
W
°C
°C
350
°C/W
BSS100 Rev. F1 / BSS123 Rev. F1