AN-996 Datasheet, PDF (1/2 Pages) Fairchild Semiconductor – Using the Fairchild FST Bus Switch as a 5V to 3V Translator

AN-996
Fairchild Semiconductor
Application Note
May 1995
Revised June 2003
Using the Fairchild FST Bus Switch
as a 5V to 3V Translator
Introduction
Fairchild FST Bus Switches can be used for bi-directional
translators. They can interface 5V components to 3V com-
ponents with negligible propagation delay (t_PD ≤ 250ps)
and minimal power dissipation (I_CC ≤ 10µA).
As the number of systems that interface between 5V and
3.3V levels increase, the use of switches for voltage level
interfacing has become more widespread.
FST Devices
FST devices produce an output voltage that is a maximum
of 1V below V_CC. This is due to the inherent design charac-
teristics of the NMOS device used in FST switch products.
When the V_GS voltage reaches V_TN, which is approxi-
mately 1V, the NMOS channel closes off. With the channel
closed, R_ON is increased dramatically and current flow
through the device is cut off. The drain, starved of current,
cannot exceed a voltage of V_CC −1V. Therefore, due to the
electrical properties of the device, a 5V switch becomes a
5V-to-4V translator.
With many systems now incorporating both 5V and 3.3V
level sections and components, the switch can be config-
ured to translate between these two levels. By dropping the
V_GATE of the NMOS by 700mV, the Bus Switch output will
be reduced to 3.3V maximum. (See Figure 1) This is
accomplished with the addition of a diode and resistor
stack on the V_CC input (see Figure 2)
To preserve the low power design of the switch and to pro-
vide optimal operation, select a low current turn on diode
with a forward turn on voltage (Vf) of at least 0.7V. A resis-
tor (R) is added from the V_CC pin to GND to provide for-
ward turn on current (If) for the diode. This is necessary to
help the diode maintain a constant voltage drop. The value
of R is dependent on the diode characteristics.
By dropping 0.7V down from the 5V power supply, ≈4.3V
will be supplied to the V_CC pin of the switch (5V − 0.7V =
4.3V). The gate of the switch will therefore be at 4.3V. Cou-
pled with the gate-to-source voltage drop of 1V limits the
V_OUT to ≈3.3V. This provides an efficient and simple
5V-to-3.3V translator.
FIGURE 1. Typical NMOS Bus Switch Waveform
FIGURE 2. Typical 5V to 3V Translation Circuit
FSTD Devices
With the increase in the number of systems that interface
between 5V and 3.3V levels, the use of switches for volt-
age level interfacing is becoming more widespread.
Fairchild Semiconductor has recognized this, and has
incorporated this feature directly into a sub-family of FST
devices named FSTD. (See Figure 3)
FIGURE 3. Fairchild Semiconductor’s FSTD device
incorporating the diode translation function and a
switch to eliminate current flow during High
Impedance mode.
The advantages of a FSTD device over the more traditional
design are lower device count, and lower power consump-
tion. FSTD devices incorporate the V_CC diode and resistor
needed for level shifting internally. In addition, there is a
switch network that shuts off the V_CC to ground current
path created by the diode and resistor when the device is in
high impedance mode. This lowers system power con-
sumption, an especially useful feature in battery operated
systems.
© 2003 Fairchild Semiconductor Corporation AN012461
www.fairchildsemi.com