AN-7517 Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – Practical Aspects

Practical Aspects of Using PowerMOS
Transistors to Drive Inductive Loads
Application Note
October 1999
AN-7517
Introduction
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Many of the more recent applications of PowerMOS transis-
tors, particularly low voltage devices, have been as solenoid
drivers. In this type of application the device is simply used
as a switch to turn the current through a solenoid, relay or
other inductive load on and off (Figure 1). Since the dissipa-
tion is low, a very small or no heat sink will be required. This
note will cover the application of the rating and characteris-
tics of PowerMOS transistors to that type of application and
illustrate the process of selecting a suitable transistor.
Defining the Problem
The circuit used in most solenoid switch applications is very
simple. It simply consists of an inductor and resistance in
series with the drain and a gate drive circuit (Figure 2). Ana-
lyzing this circuit can lead to some simplifications that will
speed design efforts.
There are three circuit states that we should analyze. The
simplest state is when the PowerMOS transistor is “off”,
when the gate and source are at the same potential. Under
this condition the dissipation in the device is simply the leak-
age current times the supply voltage V_CC. Usually this is
negligible. The second state we should consider is when the
gate drive is “on”. The PowerMOS transistor can best be rep-
resented as a series resistor. The current through that resis-
tor is:
I_T
=
------------^V----^C----^C--------------
R_L + r_DS(ON)
(EQ. 1.1)
The dissipation (P_T) in the PowerMOS transistor while the
device is “on” is:
orpo-
ion,
mi-
n-
ctor
P_T = (I_T)² × r_DS(ON)
(EQ. 1.2)
If we make the simplifying assumption that R_L >> r_DS(ON)
this is:
P_T
=



V_{---R--C--L--C--}
2
×
r_DS(ON)
(EQ. 1.3)
re-
or ()
OC
FO
f-
ark
where r_DS(ON) is the worst case resistance of the PowerMOS
transistor at its operating junction temperature. PowerMOS
L
V_GS
R_G
+
V_DD
-
0V
FIGURE 1. TYPICAL INDUCTIVE SWITCHING CIRCUIT
©2002 Fairchild Semiconductor Corporation
transistors all exhibit an increase in r_DS(ON) with temperature.
Usually this is given in the form of a curve of r_DS(ON) vs tem-
perature on the datasheet. The worst case r_DS(ON) at any ele-
vated junction temperature is determined as follows. First,
using the r_DS(ON) vs temperature curve for the device, obtain
the multiplicative factor at the expected operating junction
temperature. Finally multiply the maximum 25^oC r_DS(ON) rat-
ing by the previously determined factor.
The third state we should consider is when the switch transi-
tions from “on” to “off” or vice versa. In many solenoid switch
applications the major dissipation occurs while the Power-
MOS transistor is “on”, but turn on and turn off also dissipate
power in the transistor. The switching speed of most Power-
MOS transistors is so fast that turn on losses are usually
very small. An exception is when the drive current available
is very very small. Usually this does not occur in the real
world. For example the Fairchild RFP70N06 PowerMOS
transistor requires a maximum of 115nC of gate charge to
transition from “off” to fully “on”. For a gate drive which sup-
plies 1.0mA this would mean that the transition would take
less than 115µs. This will make a negligible change in the
junction temperature of the PowerMOS transistor.
Turn-off subjects the PowerMOS transistor to Unclamped
Inductive Switching. Modern PowerMOS transistors can
withstand this type of stress and give clear ratings in their
datasheets to let customers calculate whether or not they
are operating within the devices’ capability. The energy dissi-
pated in the PowerMOS transistor each time the current is
interrupted is:
E_T
=



L_-----×_-----I_--T---R--×_---L--V_{----D----S----S--}
×
1 – K × In_1 + _K-¹--_
(EQ. 1.4)
See Fairchild Application Note AN-7514.
Where:
K = -^V----^B----^R----^K-----–----^V----^C-----^C--
I_T × R_L
Please note that the V_BRK used here is the rated breakdown
voltage, since that is worst case, rather than the 1.3 x rated
breakdown voltage used in Application Note AN-7514.
L
R_L
V_GS
R_G
0V
+
V_DD
-
FIGURE 2. SOLENOID SWITCHING APPLICATION CIRCUIT
Application Note 7517 Rev. A2