English
Language : 

AN-558 Datasheet, PDF (1/12 Pages) Fairchild Semiconductor – Introduction to Power MOSFETS
www.fairchildsemi.com
AN-558
Introduction to Power MOSFETS and their Applications
Introduction
The Power MOSFETs that are available today perform the
same function as Bipolar transistors except the former are
voltage controlled in contrast to the current controlled
Bipolar devices. Today MOSFETs owe their ever-increasing
popularity to their high input impedance and to the fact that
being a majority carrier device, they do not suffer from
minority carrier storage time effects, thermal runaway, or
second breakdown.
MOSFET Operation
An Understanding of the operation of MOSFETs can best
be gleaned by the first considering the lateral N-channel
MOSFET shown in Figure 1.
With no electrical bias applied to the gate G, no current can
flow in either direction underneath the gate because there
will always be a blocking PN junction. When the gate is
forward biased with respect to the source S together with an
applied drain-source voltage, as shown in Figure 2, the free
hole carriers in the p-epitaxial layer are repelled away from
the gate area creating a channel, which allows electrons to
flow from the source to the drain. Note that since the holes
have been repelled from the gate channel, the electrons are
the “majority carriers” by default. This mode of operation is
called “enhancement” but is easier to think of enhancement
mode of operation as the device being “normally off”, i.e.,
the switch blocks the current until it receives a signal to turn
on. The opposite is depletion mode, which is normally “on”
device.
The advantages of the lateral MOSFET are:
1. Low gate signal power requirement. No gate current
can flow into the gate after the small gate oxide
capacitance has been charged.
2. Fast switching speeds because electrons can start to flow
from drain to source as soon as the channel opens. The
channel depth is proportional to the gate voltage and
pinches closed as soon as the gate voltage is removed, so
there is no storage time effect as occurs in transistors.
The major disadvantages are:
1. High resistance channels. In normal operation, the
source is electrically connected to the substrate. With
no gate bias, the depletion region extends out from the
N+ drain in a pseudo hemispherical shape. The channel
length L cannot be made shorter than the minimum
depletion width required to support the rated voltage of
the device.
2. Channel resistance may be decreased by creating wider
channels but this is costly since it uses up valuable
silicon real estate. It also slows down the switching
speed of the device by increasing its gate capacitance.
Figure 1. Lateral N-Channel MOSFET Cross-Section
©1998 Fairchild Semiconductor Corporation
Rev. 1.3 • 3/21/16
Figure 2. Lateral MOSFET Transistor Biased for
Forward Current Conduction
www.fairchildsemi.com