AN-4158 Datasheet, PDF (1/6 Pages) Fairchild Semiconductor – Symmetric Dual N-Channel Shielded Gate PowerTrench

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AN-4158
Symmetric Dual N-Channel Shielded Gate PowerTrench®
MOSFETs for Half-Bridge DC-DC Converter in
Telecommunication Brick Module Application
Abstract
This application note presents symmetric dual N-channel
shielded gate PowerTrench^® MOSFETs optimized for the
primary switches of a half-bridge DC-DC converter. A well-
balanced R_DS(ON) and Q_g of a shielded gate PowerTrench^®
MOSFET technology improves the Figure of Merit (FOM)
(R_DS(ON) x Q_g) factor is selected to achieve the highest
efficiency with a well-balanced ratio between conduction
loss and switching losses. A symmetric dual N-channel
Power56 package containing two identical dies for primary
high-side and low-side switches is able to increase the
power density. The validity of symmetric dual N-channel
shielded gate PowerTrench^® MOSFETs is tested on a 100 W
half-bridge DC-DC converter in a telecommunication
quarter-brick size module.
Introduction
A brick DC-DC converter with a 48 V DC voltage bus in a
telecommunication and network application needs higher
power within the limited standard area, so higher efficiency
and power are required. Internet facilities and
telecommunication systems require sophisticated
infrastructure and functionality. To design a highly efficient
brick DC-DC converter, it is important to select the proper
MOSFET because it generates most of power losses.
MOSFET power losses consist of conduction and switching
losses. Conduction loss is dominated by on-state resistance
(R_DS(ON)). Switching losses are dominated by the gate charge
(Q_g). To reduce power losses of a MOSFET, a well-
balanced R_DS(ON) and Q_g combination should be selected due
to their trade-off relationship. Excellent thermal
performance and compact size package is also essential to
increase power density because the brick size of DC-DC
converters is standardized regardless of power requirements.
This application note is organized as follows. In Section I, a
basic operation of the half-bridge DC-DC converter and
MOSFET power loss analysis in primary switch are
performed. In Section II, shielded gate PowerTrench^®
MOSFET technology is shown and the power loss of
© 2013 Fairchild Semiconductor Corporation
Rev. 1.0.0 • 5/14/13
different R_DS(ON) - Q_g combinations of the given technology
are examined. Experimental results of Power56 symmetric
dual N-channel shielded gate PowerTrench® MOSFETs in
100 W half-bridge DC-DC converter (V_IN=36 V~48 V,
V_OUT=3.3 V, I_OUT=30 A) are provided in Section III.
Section I
Telecommunication Brick DC-DC Converter
As telecommunication and network systems require a higher
power due to the complex infrastructure support, their
power architecture has been changed from Distributed
Power Architectures (DPAs) to Intermediate Bus
Architectures (IBAs) to increase the total system efficiency.
Front-end isolated converters in Figure 1 were utilized in
traditional DPAs to supply all required voltage levels from
higher input, such as 48 V, to lower voltages required by
each load. In some cases, these architectures cause high
current circulating on the boards, along with fairly large
voltage drop; therefore increasing power consumption. In
IBA, the front-end converter would be similar to DPA, but
the intermediate bus converter produces a bus line voltage
and then Point of Load (POL) converters change it into the
required voltages. Sharing this bus line means POLs can be
synchronous buck or boost converters that can achieve the
greatest efficiency and minimize the system size. An
intermediate brick DC-DC module needs a higher efficiency
and more power density as it increases its power coverage.
48Vdc
Brick
DC-DC module
Load
Brick
DC-DC module
POL
Load
Load
POL
Load
Figure 1. Distributed Power System Architecture
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