74LVX86_08 Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – Low Voltage Quad 2-Input Exclusive-OR Gate

February 2008
74LVX86
Low Voltage Quad 2-Input Exclusive-OR Gate
Features
■ Input voltage level translation from 5V to 3V
■ Ideal for low power/low noise 3.3V applications
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
General Description
The LVX86 contains four 2-input exclusive-OR gates.
The inputs tolerate voltages up to 7V allowing the inter-
face of 5V systems to 3V systems.
Ordering Information
Order
Number
74LVX86M
74LVX86SJ
74LVX86MTC
Package
Number
M14A
M14D
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
A₀–A₃
B₀–B₃
O₀–O₃
Description
Inputs
Inputs
Outputs
©1993 Fairchild Semiconductor Corporation
74LVX86 Rev. 1.4.0
www.fairchildsemi.com