74LVX86M Datasheet, PDF (1/6 Pages) Fairchild Semiconductor – Low Voltage Quad 2-Input Exclusive-OR Gate

May 1993
Revised February 2005
74LVX86
Low Voltage Quad 2-Input Exclusive-OR Gate
General Description
The LVX86 contains four 2-input exclusive-OR gates. The
inputs tolerate voltages up to 7V allowing the interface of
5V systems to 3V systems.
Features
s Input voltage level translation from 5V to 3V
s Ideal for low power/low noise 3.3V applications
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Order Number Package
Package Description
Number
74LVX86M
M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LVX86SJ
M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX86MTC
MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVX86MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
(Note 1)
Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
A₀–A₃
B₀–B₃
O₀–O₃
Description
Inputs
Inputs
Outputs
© 2005 Fairchild Semiconductor Corporation DS011605
www.fairchildsemi.com