74LVX132_08 Datasheet, PDF (1/9 Pages) Fairchild Semiconductor – Low Voltage Quad 2-Input NAND Schmitt Trigger

February 2008
74LVX132
Low Voltage Quad 2-Input NAND Schmitt Trigger
Features
■ Input voltage level translation from 5V to 3V
■ Ideal for low power/low noise 3.3V applications
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
General Description
The LVX132 contains four 2-input NAND Schmitt Trigger
Gates. The pin configuration and function are the same
as the LVX00 but the inputs have hysteresis between the
positive-going and negative-going input thresholds,
which are capable of transforming slowly changing input
signals into sharply defined, jitter-free output signals,
thus providing greater noise margins than conventional
gates.
The inputs tolerate voltages up to 7V allowing the inter-
face of 5V systems to 3V systems.
Ordering Information
Order
Number
Package
Number
Package Description
74LVX132M
74LVX132SJ
74LVX132MTC
M14A
M14D
MTC14
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1996 Fairchild Semiconductor Corporation
74LVX132 Rev. 1.4.0
www.fairchildsemi.com