74LVTH245_08 Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – 74LVT245, 74LVTH245 Low Voltage Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs

February 2008
74LVT245, 74LVTH245
Low Voltage Octal Bidirectional Transceiver with 3-STATE
Inputs/Outputs
Features
■ Input and output interface capability to systems at
5V V_CC
■ Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH245),
also available without bushold feature (74LVT245)
■ Live insertion/extraction permitted
■ Power Up/Down high impedance provides glitch-free
bus loading
■ Outputs source/sink, –32mA/+64mA
■ Latch-up performance exceeds 500mA
■ ESD performance:
– Human-body model > 2000V
– Machine model > 200V
– Charged-device model > 1000V
General Description
The LVT245 and LVTH245 contain eight non-inverting
bidirectional buffers with 3-STATE outputs and are
intended for bus-oriented applications. The Transmit/
Receive (T/R) input determines the direction of data flow
through the bidirectional transceiver. Transmit (active-
HIGH) enables data from A ports to B ports; Receive
(active-LOW) enables data from B ports to A ports. The
Output Enable input, when HIGH, disables both A and B
ports by placing them in a HIGH Z condition.
The LVTH245 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These transceivers are designed for low-voltage (3.3V)
V_CC applications, but with the capability to provide a TTL
interface to a 5V environment. The LVT245 and
LVTH245 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining a low power dissipation.
Ordering Information
Order Number
74LVT245WM
74LVT245SJ
74LVT245MSA
74LVT245MTC
74LVTH245WM
74LVTH245SJ
74LVTH245MSA
74LVTH245MTC
Package
Number
M20B
M20D
MSA20
MTC20
M20B
M20D
MSA20
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1999 Fairchild Semiconductor Corporation
74LVT245, 74LVTH245 Rev. 1.4.0
www.fairchildsemi.com