74LVTH162373 Datasheet, PDF (1/7 Pages) Fairchild Semiconductor – Low Voltage 16-Bit Transparent Latch with 3-STATE Outputs and 25ohm Series Resistors in the Outputs

October 2000
Revised June 2005
74LVTH162373
Low Voltage 16-Bit Transparent Latch with
3-STATE Outputs and
25: Series Resistors in the Outputs
General Description
The LVTH162373 contains sixteen non-inverting latches
with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. The flip-flops
appear transparent to the data when the Latch Enable (LE)
is HIGH. When LE is LOW, the data that meets the setup
time is latched. Data appears on the bus when the Output
Enable (OE) is LOW. When OE is HIGH, the outputs are in
a high impedance state.
The LVTH162373 is designed with equivalent 25: series
resistance in both the HIGH and LOW states of the output.
This design reduces line noise in applications such as
memory address drivers, clock drivers, and bus transceiv-
ers/transmitters.
The LVTH162373 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These latches are designed for low-voltage (3.3V) V_CC
applications, but with the capability to provide a TTL inter-
face to a 5V environment. The LVTH162373 is fabricated
with an advanced BiCMOS technology to achieve high
speed operation similar to 5V ABT while maintaining a low
power dissipation.
Features
s Input and output interface capability to systems at
5V V_CC
s Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
s Live insertion/extraction permitted
s Power Up/Down high impedance provides glitch-free
bus loading
s Outputs include equivalent series resistance of 25: to
make external termination resistors unnecessary and
reduce overshoot and undershoot
s Functionally compatible with the 74 series 16373
s Latch-up performance exceeds 500 mA
s ESD performance:
Human-body model ! 2000V
Machine model ! 200V
Charged-device model ! 1000V
Ordering Code:
Order Number
Package
Number
Package Description
74LVTH162373MEA
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TUBES]
74LVTH162373MEX
(Note 1)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TAPE and REEL]
74LVTH162373MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBES]
74LVTH162373MTX
(Note 1)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
Note 1: Use this Order Number to receive devices in Tape and Reel.
Logic Symbol
© 2005 Fairchild Semiconductor Corporation DS500354
www.fairchildsemi.com