74LVT162244 Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – Low Voltage 16-Bit Buffer/Line Driver with 3-STATE Outputs and 25ohm Series Resistors in the Outputs

March 1999
Revised June 2005
74LVT162244 • 74LVTH162244
Low Voltage 16-Bit Buffer/Line Driver
with 3-STATE Outputs
and 25: Series Resistors in the Outputs
General Description
The LVT162244 and LVTH162244 contain sixteen non-
inverting buffers with 3-STATE outputs designed to be
employed as a memory and address driver, clock driver, or
bus oriented transmitter/receiver. The device is nibble con-
trolled. Individual 3-STATE control inputs can be shorted
together for 8-bit or 16-bit operation.
The LVT162244 and LVTH162244 are designed with
equivalent 25: series resistance in both the HIGH and
LOW states of the output. This design reduces line noise in
applications such as memory address drivers, clock driv-
ers, and bus transceivers/transmitters.
The LVTH162244 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These buffers and line drivers are designed for low-voltage
(3.3V) V_CC applications, but with the capability to provide a
TTL interface to a 5V environment. The LVT162244 and
LVTH162244 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining a low power dissipation.
Features
s Input and output interface capability to systems at
5V V_CC
s Bushold data inputs eliminate the need for external pull-
up resistors to hold unused inputs (74LVTH162244),
also available without bushold feature (74LVT162244).
s Live insertion/extraction permitted
s Power Up/Power Down high impedance provides glitch-
free bus loading
s Outputs include equivalent series resistance of 25: to
make external termination resistors unnecessary and
reduce overshoot and undershoot
s Functionally compatible with the 74 series 162244
s Latch-up performance exceeds 500 mA
s ESD performance:
Human-body model ! 2000V
Machine model ! 200V
Charged-device ! 1000V
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Ordering Code:
Order Number
Package
Number
Package Description
74LVT162244G
(Note 1)(Note 2)
BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LVT162244MEA
(Note 2)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LVT162244MTD
(Note 2)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
74LVTH162244G
(Note 1)(Note 2)
BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LVTH162244MEA
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[Tube]
74LVTH162244MEX
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[Tape and Reel]
74LVTH162244MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[Tube]
74LVTH162244MTX
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[Tape and Reel]
Note 1: Ordering code “G” indicates Trays.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 2005 Fairchild Semiconductor Corporation DS012445
www.fairchildsemi.com