74LVQ241 Datasheet, PDF (1/6 Pages) STMicroelectronics – LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS NON INVERTED

February 1992
Revised June 2001
74LVQ241
Low Voltage Octal Buffer/Line Driver
with 3-STATE Outputs
General Description
The LVQ241 is an octal buffer and line driver designed to
be employed as a memory address driver, clock driver and
bus oriented transmitter or receiver which provides
improved PC board density.
Features
s Ideal for low power/low noise 3.3V applications
s Implements patented EMI reduction circuitry
s Available in SOIC JEDEC, SOIC EIAJ and QSOP pack-
ages
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Improved latch-up immunity
s Guaranteed incident wave switching into 75Ω
s 4 kV minimum ESD immunity
Ordering Code:
Order Number Package Number
Package Description
74LVQ241SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVQ241SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVQ241QSC
MQA20
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
OE₁, OE₂
I₀–I₇
O₀–O₇
Description
3-STATE Output Enable Inputs
Inputs
Outputs
© 2001 Fairchild Semiconductor Corporation DS011355
Truth Tables
Inputs
OE₁
I_n
L
L
L
H
H
X
Outputs
(Pins 12, 14, 16, 18)
L
H
Z
Inputs
Outputs
OE₂
I_n
(Pins 3, 5, 7, 9)
L
X
Z
H
H
H
H
L
L
H = HIGH Voltage Level X = Immaterial
L = LOW Voltage Level Z = High Impedance
www.fairchildsemi.com