74LCXZ245_05 Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – Low Voltage Bidirectional Transceiver with 5V Tolerant Inputs and Outputs

October 2000
Revised March 2005
74LCXZ245
Low Voltage Bidirectional Transceiver
with 5V Tolerant Inputs and Outputs
General Description
The 74LCXZ245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus ori-
ented applications. The device is designed for low voltage
(2.5V and 3.3V) V_CC applications with capability of interfac-
ing to a 5V signal environment. The T/R input determines
the direction of data flow through the device. The OE input
disables both the A and B ports by placing them in a high
impedance state.
The 74LCXZ245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation. When V_CC is between 0V
and 1.5V, the 74LCXZ245 is on the high impedance state
during power up or power down. This places the outputs in
the high impedance (Z) state preventing intermittent low
impedance loading or glitching in bus oriented applications.
Features
s 5V tolerant inputs and outputs
s 2.3V–3.6V V_CC specifications provided
s 7.0 ns t_PD max (V_CC 3.3V), 10 PA I_CC max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s r24 mA output drive (V_CC 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model ! 2000V
Machine model ! 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V_CC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number Package Number
Package Description
74LCXZ245WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LCXZ245SJ
M20D
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCXZ245MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LCXZ245MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
Description
OE
T/R
A₀–A₇
B₀–B₇
Output Enable Input
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
© 2005 Fairchild Semiconductor Corporation DS500362
www.fairchildsemi.com