74LCXZ16240 Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – Low Voltage 16-Bit Inverting Buffer/Line Driver with 5V Tolerant Inputs/Outputs (Preliminary)

Preliminary
February 2000
Revised February 2000
74LCXZ16240
Low Voltage 16-Bit Inverting Buffer/Line Driver with
5V Tolerant Inputs/Outputs (Preliminary)
General Description
The LCXZ16240 contains sixteen inverting buffers with 3-
STATE outputs designed to be employed as a memory and
address driver, clock driver, or bus-oriented transmitter/
receiver. The device is nibble controlled. Each nibble has
separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
When V_CC is between 0 and 1.5V, the LCXZ16240 is in the
high impedance state during power up or power down. This
places the outputs in the high impedance (Z) state prevent-
ing intermittent low impedance loading or glitching in bus
oriented applications.
The LCXZ16240 is designed for low voltage (2.7V or 3.3V)
V_CC applications with capacity of interfacing to a 5V signal
environment.
The LCXZ16240 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s Guaranteed power up/down high impedance
s Supports live insertion/withdrawal
s 2.7V–3.6V V_CC specifications provided
s 4.5 ns t_PD max (V_CC = 3.3V), 20 µA I_CC max
s ±24 mA output drive (V_CC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Ordering Code:
Order Number Package Number
Package Description
74LCXZ16240MEA
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74LCXZ16240MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Symbol
Pin Descriptions
Pin Names
OE_n
I₀–I₁₅
O₀–O₁₅
Description
Output Enable Inputs (Active LOW)
Inputs
Outputs
© 2000 Fairchild Semiconductor Corporation DS500257
www.fairchildsemi.com