74LCX574 Datasheet, PDF (1/14 Pages) Fairchild Semiconductor – Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs

February 2006
74LCX574
Low Voltage Octal D-Type Flip-Flop
with 5V Tolerant Inputs and Outputs
Features
■ 5V tolerant inputs and outputs
■ 2.3V–3.6V V_CC specifications provided
■ 7.5ns t_PD max (V_CC = 3.3V), 10µA I_CC max
■ Power down high impedance inputs and outputs
■ Supports live insertion/withdrawal¹
■ ±24mA output drive (V_CC = 3.0V)
■ Implements patented noise/EMI reduction circuitry
■ Latch-up performance exceeds JEDEC 78 conditions
■ ESD performance
– Human body model > 2000V
– Machine model > 200V
■ Leadless Pb-Free DQFN package
General Description
The LCX574 is a high-speed, low power octal flip-flop
with a buffered common Clock (CP) and a buffered
common Output Enable (OE). The information presented
to the D inputs is stored in the flip-flops on the LOW-to-
HIGH Clock (CP) transition.
The LCX574 is functionally identical to the LCX374
except for the pinouts.
The LCX574 is designed for low voltage applications with
capability of interfacing to a 5V signal environment. The
LCX574 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Ordering Information
Package
Order Number Number
Package Description
74LCX574WM
74LCX574WM_NL³
M20B
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300"
Wide
74LCX574SJ
74LCX574BQX²
M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MLP020B Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN),
JEDEC MO-241, 2.5 x 4.5mm
74LCX574MSA
MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LCX574MTC
74LCX574MTC_NL³
MTC20
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Notes:
1. To Ensure the high impedance state during power up or down, OE should be tied to V_CC through a pull-up resistor: the minimum
value of the resistor is determined by the current-sourcing capability of the driver.
2. DQFN package available in Tape and Reel only
3. “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
©2006 Fairchild Semiconductor Corporation
1
74LCX574 Rev. 2.0.0
www.fairchildsemi.com