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74LCX573_08 Datasheet, PDF (1/14 Pages) Fairchild Semiconductor – Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs
February 2008
74LCX573
Low Voltage Octal Latch with 5V Tolerant
Inputs and Outputs
Features
■ 5V tolerant inputs and outputs
■ 2.3V–3.6V VCC specifications provided
■ 7.0 ns tPD max. (VCC = 3.3V), 10µA ICC max.
■ Power down high impedance inputs and outputs
■ Supports live insertion/withdrawal(1)
■ ±24mA output drive (VCC = 3.0V)
■ Implements proprietary noise/EMI reduction circuitry
■ Latch-up performance exceeds JEDEC 78 conditions
■ ESD performance
– Human body model > 2000V
– Machine model > 200V
■ Leadless DQFN package
Note:
1. To ensure the high impedance state during power up
or down, OE should be tied to VCC through a pull-up
resistor: the minimum value of the resistor is
determined by the current-sourcing capability of the
driver.
General Description
The LCX573 is a high-speed octal latch with buffered
common Latch Enable (LE) and buffered common Out-
put Enable (OE) input.
The LCX573 is functionally identical to the LCX373 but
has inputs and outputs on opposite sides.
The LCX573 is designed for low voltage applications
with capability of interfacing to a 5V signal environment.
The LCX573 is fabricated with an advanced CMOS
tech- nology to achieve high speed operation while
maintaining CMOS low power dissipation.
Ordering Information
Order
Number
Package
Number
Package Description
74LCX573WM
74LCX573SJ
74LCX573BQX(2)
M20B
M20D
MLP20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 4.5mm
74LCX573MSA
MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LCX573MTC
MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Note:
2. DQFN package available in Tape and Reel only.
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©2006 Fairchild Semiconductor Corporation
74LCX573 Rev. 1.6.0
www.fairchildsemi.com