74LCX374_06 Datasheet, PDF (1/14 Pages) Fairchild Semiconductor – Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs

February 2006
74LCX374
Low Voltage Octal D-Type Flip-Flop
with 5V Tolerant Inputs and Outputs
Features
■ 5V tolerant inputs and outputs
■ 2.3V–3.6V V_CC specifications provided
■ 8.5ns t_PD max (V_CC = 3.3V), 10µA I_CC max
■ Power-down high impedance inputs and outputs
■ Supports live insertion/withdrawal¹
■ ±24mA output drive (V_CC = 3.0V)
■ Implements patented noise/EMI reduction circuitry
■ Latch-up performance exceeds JEDEC 78 conditions
■ ESD performance
– Human Body Model > 2000V
– Machine Model > 200V
■ Leadless Pb-Free DQFN package
General Description
The LCX374 consists of eight D-type flip-flops featuring
separate D-type inputs for each flip-flop and 3-STATE
outputs for bus-oriented applications. A buffered clock
(CP) and Output Enable (OE) are common to all flip-
flops. The LCX374 is designed for low voltage appli-
cations with capability of interfacing to a 5V signal
environment.
The LCX374 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Ordering Information
Order Number
74LCX374WM
74LCX374SJ
74LCX374BQX²
74LCX374MSA
74LCX374MTC
74LCX374MTCX_NL³
Package
Number
M20B
M20D
MLP020B
MSA20
MTC20
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300"
Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads
(DQFN), JEDEC MO-241, 2.5 x 4.5mm
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm
Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC
MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Notes:
1. To ensure the high impedance state during power up or down, OE should be tied to V_CC through a pull-up resistor: the minimum
value of the resistor is determined by the current-sourcing capability of the driver.
2. DQFN package available in Tape and Reel only.
3. “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
©2006 Fairchild Semiconductor Corporation
1
74LCX374 Rev. 2.0.0
www.fairchildsemi.com