74LCX162373_05 Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs and 26ohm Series Resistor

February 2001
Revised May 2005
74LCX162373
Low Voltage 16-Bit Transparent Latch
with 5V Tolerant Inputs and Outputs
and 26: Series Resistor
General Description
The LCX162373 contains sixteen non-inverting latches
with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. The flip-flops
appear transparent to the data when the Latch Enable (LE)
is HIGH. When LE is LOW, the data that meets the setup
time is latched. Data appears on the bus when the Output
Enable (OE) is LOW. When OE is HIGH, the outputs are in
a high impedance state.
The LCX162373 is designed for low voltage (2.5V or 3.3V)
V_CC applications with capability of interfacing to a 5V signal
environment. The 26: series resistor in the output helps
reduce output overshoot and undershoot.
The LCX162373 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V–3.6V V_CC specifications provided
s Equivalent 26: series resistor outputs
s 6.2 ns t_PD max (V_CC 3.3V), 20 PA I_CC max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s r12 mA output drive (V_CC 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model ! 2000V
Machine model ! 200V
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V_CC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number Package Number
Package Description
74LCX162373GX
(Note 2)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
(Preliminary) [TAPE and REEL]
74LCX162373MEA
(Note 3)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LCX162373MTD
(Note 3)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 2: BGA package available in Tape and Reel only.
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
© 2005 Fairchild Semiconductor Corporation DS500443
www.fairchildsemi.com