74LCX11 Datasheet, PDF (1/11 Pages) Fairchild Semiconductor – Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

April 1995
Revised July 2005
74LCX11
Low Voltage Triple 3-Input AND Gate
with 5V Tolerant Inputs
General Description
The LCX11 is a triple 3-input AND gate with buffered out-
puts. LCX devices are designed for low voltage (2.5V or
3.3V) operation with the added capability of interfacing to a
5V signal environment.
The 74LCX11 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V–3.6V V_CC specifications provided
s 6.0ns t_PD max (V_CC 3.3V), 10 PA I_CC max
s Power down high impedance inputs and outputs
s r24 mA output drive (V_CC 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds JEDEC 78 conditions
s ESD performance:
Human body model ! 2000V
Machine model ! 200V
s Leadless DQFN Package
Ordering Code:
Order Number
Package
Number
Package Description
74LCX11M
M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LCX11MX_NL
(Note 1)
M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LCX11SJ
M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX11BQX
(Note 2)
MLP014A Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
74LCX11MTC
MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LCX11MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
(Note 1)
Wide
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Note 2: DQFN package available in Tape and Reel only.
© 2005 Fairchild Semiconductor Corporation DS012426
www.fairchildsemi.com