74LCX08_08 Datasheet, PDF (1/13 Pages) Fairchild Semiconductor – Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

February 2008
74LCX08
Low Voltage Quad 2-Input AND Gate with 5V
Tolerant Inputs
Features
■ 5V tolerant inputs
■ 2.3V–3.6V V_CC specifications provided
■ 5.5ns t_PD max. (V_CC = 3.3V), 10µA I_CC max.
■ Power down high impedance inputs and outputs
■ ±24mA output drive (V_CC = 3.0V)
■ Implements proprietary noise/EMI reduction circuitry
■ Latch-up performance exceeds JEDEC 78 conditions
■ ESD performance:
– Human body model > 2000V
– Machine model > 150V
■ Leadless DQFN package
General Description
The LCX08 contains four 2-input AND gates. The inputs
tolerate voltages up to 7V allowing the interface of 5V
systems to 3V systems.
The 74LVX08 is fabricated with advanced CMOS tech-
nology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Ordering Information
Package
Order Number Number
Package Description
74LCX08M
M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LCX08SJ
74LCX08BQX⁽¹⁾
M14D
MLP14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
74LCX08MTC
MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Note:
1. DQFN package available in Tape and Reel only.
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1995 Fairchild Semiconductor Corporation
74LCX08 Rev. 1.5.0
www.fairchildsemi.com