74FR900 Datasheet, PDF (1/6 Pages) Fairchild Semiconductor – 9-Bit, 3-Port Latchable Datapath Multiplexer

May 1992
Revised August 1999
74FR900
9-Bit, 3-Port Latchable Datapath Multiplexer
General Description
The 74FR900 is a data bus multiplexer routing any of three
9-bit ports to any other one of the three ports. Readback of
data latched from any port onto itself is also possible. The
74FR900 maintains separate control of all latch-enable,
output enable and select inputs for maximum flexibility.
PINV allows inversion of the data from the C₈ to A₈ or B₈
path. This is useful for control of the parity bit in systems
diagnostics.
Fairchild’s 74FR25900 includes 25Ω resistors in series with
port A and B outputs. Resistors minimize undershoot and
ringing which may damage or corrupt sensitive device
inputs driven by these ports.
Features
s 9-bit data ports for systems carrying parity bits
s Readback capability for system self checks.
s Independent control lines for maximum flexibility
s Guaranteed multiple output switching and 250 pF load
delays
s Outputs optimized for dynamic bus drive capability
s PINV parity control facilitates system diagnostics
s FR25900 resistor option for driving MOS inputs such as
DRAM arrays
Ordering Code:
Order Number Package Number
Package Description
74FR900SSC
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Description
Pin Names
LExx
OE_x
PINV
S₀, S₁
A₀–A₈
B₀–B₈
C₀–C₈
Description
Latch Enable Inputs
Output Enable Inputs
Parity Invert Input
Select Inputs
Port A Inputs or 3-STATE Outputs
Port B Inputs or 3-STATE Outputs
Port C Inputs or 3-STATE Outputs
© 1999 Fairchild Semiconductor Corporation DS010990
www.fairchildsemi.com