74F379_00 Datasheet, PDF (1/7 Pages) Fairchild Semiconductor – Quad Parallel Register with Enable

May 1988
Revised October 2000
74F379
Quad Parallel Register with Enable
General Description
The 74F379 is a 4-bit register with buffered common
Enable. This device is similar to the 74F175 but features
the common Enable rather than common Master Reset.
Features
s Edge triggered D-type inputs
s Buffered positive edge-triggered clock
s Buffered common enable input
s True and complement outputs
Ordering Code:
Order Number Package Number
Package Description
74F379SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74F379SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F379PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 2000 Fairchild Semiconductor Corporation DS009527
www.fairchildsemi.com