74F27 Datasheet, PDF (1/4 Pages) NXP Semiconductors – Triple 3-input NOR gate

April 1988
Revised August 1999
74F27
Triple 3-Input NOR Gate
General Description
This device contains three independent gates, each of
which performs the logic NOR function.
Ordering Code:
Order Number Package Number
Package Description
74F27SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F27SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F27PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Unit Loading/Fan Out
Function Table
Pin Names Description U.L.
Input I_IH/I_IL
HIGH/LOW Output I_OH/I_OL
A_n, B_n, C_n Data Inputs
O_n
Data Outputs
1.0/1.0
50/33.3
20 µA/−0.6 mA
−1 mA/20 mA
Inputs
Output
A_n
B_n
C_n
O_n
L
L
L
H
X
X
H
L
X
H
X
L
H
X
X
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
© 1999 Fairchild Semiconductor Corporation DS009539
www.fairchildsemi.com