74F192_00 Datasheet, PDF (1/7 Pages) Fairchild Semiconductor – Up/Down Decade Counter with Separate Up/Down Clocks

April 1988
Revised September 2000
74F192
Up/Down Decade Counter
with Separate Up/Down Clocks
General Description
The 74F192 is an up/down BCD decade (8421) counter.
Separate Count Up and Count Down Clocks are used, and
in either counting mode the circuits operate synchronously.
The outputs change state synchronously with the
LOW-to-HIGH transitions on the clock inputs.
Separate Terminal Count Up and Terminal Count Down
outputs are used as the clocks for a subsequent stage
without extra logic, thus simplifying multistage counter
designs. Individual preset inputs allow the circuit to be used
as a programmable counter. Both the Parallel Load (PL)
and the Master Reset (MR) inputs asynchronously override
the clocks.
Features
s Guaranteed 4000V minimum ESD protection
Ordering Code:
Order Number Package Number
Package Description
74F192SJ
(Note 1)
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F192PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Note 1: Device not available in Tape and Reel.
Logic Symbols
Connection Diagram
IEEE/IEC
© 2000 Fairchild Semiconductor Corporation DS009496
www.fairchildsemi.com