74AUP1G96 Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – TinyLogic® Low Power Universal Configurable Two-Input Logic Gate (Open Drain Output)

September 2012
74AUP1G96
TinyLogic^® Low Power Universal Configurable
Two-Input Logic Gate (Open Drain Output)
Features
 0.8 V to 3.6V V_CC Supply Operation
 3.6 V Over-Voltage Tolerant I/Os at V_CC
from 0.8 V to 3.6 V
 Extremely High Speed tPD
- 3.2 ns: Typical at 3.3 V
 Power-Off High-Impedance Inputs and Outputs
 Low Static Power Consumption
- I_CC=0.9 µA Maximum
 Low Dynamic Power Consumption
- C_PD=3.0 pF Typical at 3.3 V
 Ultra-Small MicroPak™ Packages
Description
The 74AUP1G96 is a universal configurable. two-input
logic gate with an open-drain output that provides a
high-performance and low-power solution for battery-
powered portable applications. This product is
designed for a wide low voltage operating range (0.8 V
to 3.6 V) and guarantees very low static and dynamic
power consumption across the entire voltage range. All
inputs are implemented with hysteresis to allow for
slower transition input signals and better switching
noise immunity.
The 74AUP1G96 provides for multiple functions as
determined by various configurations of the three inputs.
The potential logic functions provided are MUX, AND,
OR, NAND, and, NOR inverter and buffer (see Figure 2
to Figure 8).
Ordering Information
Part Number Top Mark
Package
Packing Method
74AUP1G96L6X
74AUP1G96FHX
AP
6-Lead, MicroPak™ 1.0 x 1.45mm, JEDEC MO-252
AP
6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch
5000 Units on
Tape & Reel
5000 Units on
Tape & Reel
© 2008 Fairchild Semiconductor Corporation
74AUP1G96 • Rev. 1.0.1
www.fairchildsemi.com