74ALVCH16373 Datasheet, PDF (1/7 Pages) NXP Semiconductors – 2.5V/3.3V 16-bit D-type transparent latch 3-State

October 2001
Revised February 2002
74ALVCH16373
Low Voltage 16-Bit Transparent Latch with Bushold
General Description
The ALVCH16373 contains sixteen non-inverting latches
with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. The flip-flops
appear to be transparent to the data when the Latch
Enable (LE) is HIGH. When LE is LOW, the data that meets
the setup time is latched. Data appears on the bus when
the Output Enable (OE) is LOW. When OE is HIGH, the
outputs are in a high impedance state.
The ALVCH16373 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
The 74ALVCH16373 is designed for low voltage (1.65V to
3.6V) V_CC applications with output compatibility up to 3.6V.
The 74ALVCH16373 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s 1.65V to 3.6V V_CC supply operation
s 3.6V tolerant control inputs and outputs
s Bushold on data inputs eliminates the need for external
pull-up/pull-down resistors
s t_PD (I_n to O_n)
3.6 ns max for 3.0V to 3.6V V_CC
4.5 ns max for 2.3V to 2.7V V_CC
6.8 ns max for 1.65V to 1.95V V_CC
s Uses patented noise/EMI reduction circuitry
s Latch-up conforms to JEDEC JED78
s ESD performance:
Human body model > 2000V
Machine model > 200V
Ordering Code:
Order Number
Package
Number
Package Description
74ALVCH16373T
MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
© 2002 Fairchild Semiconductor Corporation DS500631
www.fairchildsemi.com