74ALVC86_05 Datasheet, PDF (1/5 Pages) Fairchild Semiconductor – Low Voltage Quad 2-Input Exclusive-OR Gate with 3.6V Tolerant Inputs and Outputs

December 2001
Revised March 2005
74ALVC86
Low Voltage Quad 2-Input Exclusive-OR Gate with
3.6V Tolerant Inputs and Outputs
General Description
The ALVC86 contains four 2-input exclusive OR gates.
This product is designed for low voltage (1.65V to 3.6V)
V_CC applications with I/O compatibility up to 3.6V
The 74ALVC86 is fabricated with an advanced CMOS
technology to achieve high-speed operation while main-
taining low CMOS power dissipation.
Features
s 1.65V to 3.6V V_CC supply operation
s 3.6V tolerant inputs and outputs
s t_PD
3.5 ns max for 3.0V to 3.6V V_CC
4.4 ns max for 2.3V to 2.7V V_CC
7.8 ns max for 1.65V to 1.95V V_CC
s Power-off high impedance inputs and outputs
s Uses patented Quiet Series¥ noise/EMI reduction
circuitry
s Latchup conforms to JEDEC JED78
s ESD performance:
Human body model ! 2000V
Machine model ! 250V
Ordering Code:
Order Number
Package
Number
Package Description
74ALVC86M
M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74ALVC86MTC
MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ALVC86MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
(Note 1)
Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
A_n, B_n
O_n
Description
Inputs
Outputs
Â¥ Quiet Series is a trademark of Fairchild Semiconductor Corporation
© 2005 Fairchild Semiconductor Corporation DS500718
www.fairchildsemi.com