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74ALVC32_05 Datasheet, PDF (1/5 Pages) Fairchild Semiconductor – Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs
September 2001
Revised February 2005
74ALVC32
Low Voltage Quad 2-Input OR Gate
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC32 contains four 2-input OR gates. This product
is designed for low voltage (1.65V to 3.6V) VCC applica-
tions with I/O compatibility up to 3.6V.
The ALVC32 is fabricated with an advanced CMOS tech-
nology to achieve high-speed operation while maintaining
low CMOS power dissipation.
Features
s 1.65V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD
2.8 ns max for 3.0V to 3.6V VCC
3.1 ns max for 2.3V to 2.7V VCC
4.7 ns max for 1.65V to 1.95V VCC
s Power-off high impedance inputs and outputs
s Uses patented Quiet Series¥ noise/EMI reduction
circuitry
s Latchup conforms to JEDEC JED78
s ESD performance:
Human body model ! 2000V
Machine model ! 250V
Ordering Code:
Order Number
Package
Number
Package Description
74ALVC32M
M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74ALVC32MTC
MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ALVC32MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
(Note 1)
Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Logic Symbol
Connection Diagram
IEEC/IEC
Pin Descriptions
Pin Names
An, Bn
On
Description
Inputs
Outputs
Â¥ Quiet Series is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation DS500643
www.fairchildsemi.com