74ACT16240_05 Datasheet, PDF (1/6 Pages) Fairchild Semiconductor – 16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs

August 1999
Revised May 2005
74ACT16240
16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs
General Description
The ACT16240 contains sixteen inverting buffers with
3-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus-oriented transmit-
ter/receiver. The device is nibble controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
Features
s Separate control logic for each byte
s 16-bit version of the ACT240
s Outputs source/sink 24 mA
s TTL-compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74ACT16240SSC
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74ACT16240MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
Description
OE_n
I₀–I₁₅
O₀–O₁₅
Output Enable Inputs (Active LOW)
Inputs
Outputs
FACTÂ¥ is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation DS500293
www.fairchildsemi.com