74AC646 Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – Octal Transceiver/Register with 3-STATE Outputs

November 1988
Revised December 1998
74AC646 • 74ACT646
Octal Transceiver/Register with 3-STATE Outputs
General Description
The AC/ACT646 consist of registered bus transceiver cir-
cuits, with outputs, D-type flip-flops and control circuitry
providing multiplexed transmission of data directly from the
input bus or from the internal storage registers. Data on the
A or B bus will be loaded into the respective registers on
the LOW-to-HIGH transition of the appropriate clock pin
(CPAB or CPBA). The four fundamental data handling
functions available are illustrated in Figure 1, Figure 2, Fig-
ure 3, and Figure 4.
Features
s Independent registers for A and B buses
s Multiplexed real-time and stored data transfers
s 3-STATE outputs
s 300 mil dual-in-line package
s Outputs source/sink 24 mA
s ACT646 has TTL compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74AC646SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
74AC646SPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300” Wide
74ACT646SPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
Pin Assignment
for DIP and SOIC
IEEE/IEC
FACT™ is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS010132.prf
Pin Descriptions
Pin Names
A₀–A₇
B₀–B₇
CPAB, CPBA
SAB, SBA
G
DIR
Description
Data Register A Inputs
Data Register A Outputs
Data Register B Inputs
Data Register B Outputs
Clock Pulse Inputs
Transmit/Receive Inputs
Output Enable Input
Direction Control Input
www.fairchildsemi.com