74AC280 Datasheet, PDF (1/6 Pages) STMicroelectronics – 9 BIT PARITY GENERATOR

November 1988
Revised November 1999
74AC280
9-Bit Parity Generator/Checker
General Description
The AC280 is a high-speed parity generator/checker that
accepts nine bits of input data and detects whether an
even or an odd number of these inputs is HIGH. If an even
number of inputs is HIGH, the Sum Even output is HIGH. If
an odd number is HIGH, the Sum Even output is LOW. The
Sum Odd output is the complement of the Sum Even out-
put.
Features
s I_CC reduced by 50%
s 9-bit width for memory applications
s AC280: 5962-92201
Ordering Code:
Order Number Package Number
Package Description
74AC280SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
74AC280SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
I₀–I₈
∑_Ο
∑_Ε
Description
Data Inputs
Odd Parity Output
Even Parity Output
Truth Table
Number of
HIGH Inputs
I₀–I₈
0, 2, 4, 6, 8
1, 3, 5, 7, 9
H = HIGH Voltage Level
L = LOW Voltage Level
Outputs
∑ Even
∑ Odd
H
L
L
H
FACT is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS009955
www.fairchildsemi.com