6N137M Datasheet, PDF (1/13 Pages) Fairchild Semiconductor – High Speed 10MBit/s Logic Gate Optocouplers

February 2010
Single-Channel: 6N137M, HCPL2601M, HCPL2611M
Dual-Channel: HCPL2630M, HCPL2631M (Preliminary)
High Speed 10MBit/s Logic Gate Optocouplers
Features
■ Very high speed – 10 MBit/s
■ Superior CMR – 10 kV/µs
■ Fan-out of 8 over -40°C to +85°C
■ Logic gate output
■ Strobable output
■ Wired OR-open collector
■ U.L. recognized (File # E90700, Vol. 2)
Applications
■ Ground loop elimination
■ LSTTL to TTL, LSTTL or 5-volt CMOS
■ Line receiver, data transmission
■ Data multiplexing
■ Switching power supplies
■ Pulse transformer replacement
■ Computer-peripheral interface
Description
The 6N137M, HCPL2601M, HCPL2611M single-channel
and HCPL2630M, HCPL2631M dual-channel optocou-
plers consist of a 850 nm AlGaAS LED, optically coupled
to a very high speed integrated photo-detector logic gate
with a strobable output. This output features an open col-
lector, thereby permitting wired OR outputs. The
switching parameters are guaranteed over the tempera-
ture range of -40°C to +85°C. A maximum input signal of
5mA will provide a minimum output sink current of 13mA
(fan out of 8).
An internal noise shield provides superior common
mode rejection of typically 10kV/µs. The HCPL2601M
and HCPL2631M has a minimum CMR of 5kV/µs. The
HCPL2611M has a minimum CMR of 10kV/µs.
Schematics
Package Outlines
N/C 1
+2
V
F
_3
N/C 4
8
V
CC
7V
E
+1
V
F1
_2
6V
O
5 ^GND
_3
V
F2
+4
8
V
CC
7V
01
6V
02
5 ^GND
6N137M
HCPL2601M
HCPL2611M
HCPL2630M
HCPL2631M
(Preliminary)
A 0.1µF bypass capacitor must be connected between pins 8 and 5⁽¹⁾.
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL2601M, HCPL2611M, HCPL2630M, HCPL2631M Rev. 1.0.3
8
1
8
1
8
1
8
1
Truth Table (Positive Logic)
Input
Enable
H
H
L
H
H
L
L
L
H
NC
L
NC
Output
L
H
H
H
L
H
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