100304 Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – Low Power Quint AND/NAND Gate

August 1989
Revised August 2000
100304
Low Power Quint AND/NAND Gate
General Description
The 100304 is monolithic quint AND/NAND gate. The
Function output is the wire-NOR of all five AND gate out-
puts. All inputs have 50 kΩ pull-down resistors.
Features
s Low Power Operation
s 2000V ESD protection
s Pin/function compatible with 100104
s Voltage compensated operating range = −4.2V to −5.7V
s Available to industrial grade temperature range
(PLCC package only)
Ordering Code:
Order Number Package Number
Package Description
100304PC
N24E
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
100304QC
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100304QI
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (−40°C to +85°C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP
Pin Descriptions
Pin Names
Description
D_na–D_ne
F
Data Inputs
Function Output
O_a–O_e
O_a–O_e
Data Outputs
Complementary Data Outputs
Logic Equation
F = (D_1a • D_2a) + (D_1b • D_2b) + (D_1c • D_2c) +
(D_1d • D_2d) + (D_1e • D_2e).
© 2000 Fairchild Semiconductor Corporation DS010581
28-Pin PLCC
www.fairchildsemi.com