ES29LV400E Datasheet, PDF (9/51 Pages) Excel Semiconductor Inc. – 4Mbit(512Kx 8/256K x 16) CMOS 3.0 Volt-only, Boot Sector Flash Memory

EE SS II
Excel Semiconductor inc.
In-System Unprotection
“In-system unprotection”, the primary method,
requires V_ID (11.5V~12.5V) on the RESET# with
A6=1, A1=1, and A0=0. This method can be imple-
mented either in-system or via programming equip-
ment. This method uses standard microprocessor
bus cycle timing. Refer to Fig. 26 for timing diagram
and Fig. 3 for the unprotection algorithm.
A9 High-Voltage Unprotection
“High-voltage unprotection”, the alternate method
intended only for programming equipment, must
force V_ID (11.5~12.5V) on address pin A9 and con-
trol pin OE# with A6=1, A1=1 and A0=0. Refer to
Fig. 29 for timing diagram and Fig. 5 for the unpro-
tection algorithm.
Temporary Sector Unprotect
This feature allows temporary unprotection of previ-
ously protected sectors to change data in-system.
The Sector Unprotect mode is activated by setting
the RESET# pin to V_ID (11.5V-12.5V). During this
mode, formerly protected sectors can be pro-
grammed or erased by selecting the sector
addresses. Once V_ID is removed from the RESET#
pin, all the previously protected sectors are pro-
tected again. Fig. 1 shows the algorithm, and Fig. 25
shows the timing diagrams for this feature.
HARDWARE DATA PROTECTION
The ES29LV400 device provides some protection
measures against accidental erasure or program-
ming caused by spurious system level signals that
may exist during power transition. During power-up,
all internal registers and latches in the device are
cleared and the device automatically resets to the
read mode. In addition, with its internal state
machine built-in the device, any alteration of the
memory contents or any initiation of new operation-
can only occur after successful completion of spe-
cific command sequences. And several features are
incorporated to prevent inadvertent write cycles
resulting from Vcc power-up and power-down transi-
tion or system noise.
Low Vcc Write inhibit
When Vcc is less than V_LKO, the device does not
accept any write cycles. This protects data during
Vcc power-up and power-down.
The command register and all internal program/
erase circuits are disabled, and the device resets to
the read mode. Subsequent writes are ignored until
Vcc is greater than V_LKO. The system must provide
proper signals to the control pins to prevent unin-
tentional writes when Vcc is greater than V_LKO.
Write Pulse “Glitch” Protection
Noise pulses of less than 5ns (typical) on OE#, CE#
or WE# do not initiate a write cycle.
Logical inhibit
Write cycles are inhibited by holding any one of
OE#=V_IL, CE#=V_IH or WE#=V_IH. To initiate a write
cycle, CE# and WE# must be a logical zero while
OE# is a logical one.
Power-up Write Inhibit
If WE#=CE#=V_IL and OE#=V_IH during power up,
the device does not accept any commands on the
rising edge of WE#. The internal state machine is
automatically reset to the read mode on power-up.
START
RESET# = V_ID
(Note 1)
Perform Erase or
Program Operations
RESET# = V_IH
Temporary Sector
Unprotect Completed
(Note 2)
Notes:
1. All protected sectors are unprotected .
2. All previously protected sectors are protected once again.
Figure 1. Temporary Sector Unprotect
Operation
ES29LV400E
9
Rev.0B January 5, 2006