EPA240D-100P Datasheet, PDF (1/1 Pages) Excelics Semiconductor, Inc. – High Efficiency Heterojunction Power FET

UPDATED 11/14/2005
EPA240D-100P
High Efficiency Heterojunction Power FET
• NON-HERMETIC 100MIL METAL FLANGE PACKAGE
• +33 dBm TYPICAL OUTPUT POWER
• 20 dB TYPICAL POWER GAIN AT 2GHz
• 0.4 X 2400 MICRON RECESSED “MUSHROOM” GATE
• Si₃N₄ PASSIVATION
G
• ADVANCED EPITAXIAL HETEROJUNCTION
PROFILE PROVIDES EXTRA HIGH POWER
EFFICIENCY, AND HIGH RELIABILITY
ELECTRICAL CHARACTERISTICS (T_a = 25 ^OC)
SYMBOLS
P_1dB
G_1dB
PAE
Idss
Gm
PARAMETERS/TEST CONDITIONS
Output Power at 1dB Compression
Vds=8V, Ids=50% Idss
f= 2GHz
f= 4GHz
Gain at 1dB Compression
Vds=8V, Ids=50% Idss
f= 2GHz
f= 4GHz
Power Added Efficiency at 1dB Compression
Vds=8 V, Ids=50% Idss
f=2GHz
Saturated Drain Current
Vds=3V, Vgs=0V
Transconductance
Vds=3V, Vgs=0V
MIN
31.0
18.5
440
480
Vp
Pinch-off Voltage
Vds=3V, Ids=6mA
BVgd Drain Breakdown Voltage
Igd=2.4mA
-11
BVgs
Source Breakdown Voltage
Igs=2.4mA
-7
Rth
Thermal Resistance (Au-Sn Eutectic Attach)
* Overall Rth depends on case mounting.
ABSOLUTE MAXIMUM RATING^1,2
SYMBOLS
PARAMETERS
ABSOLUTE¹
Vds
Drain-Source Voltage
12V
Vgs
Gate-Source Voltage
-8V
Ids
Drain Current
Idss
Igsf
Forward Gate Current
120mA
Pin
Input Power
Tch
Channel Temperature
Tstg
Storage Temperature
30 dBm
175 ^oC
-65 to +175 ^oC
Pt
Total Power Dissipation
6.0W
Note: 1. Exceeding any of the above ratings may result in permanent damage.
2. Exceeding any of the above ratings may reduce MTTF below design goals.
D
TYP
33.0
33.0
20.0
14.5
55
720
760
-1.0
-15
-14
26*
MAX
940
-2.5
UNIT
dBm
dB
%
mA
mS
V
V
V
ºC/W
CONTINUOUS²
8V
-3V
620mA
20mA
@ 3dB Compression
150 ^oC
-65 to +150 ^oC
5.0W
Specifications are subject to change without notice.
Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085
page 1 of 1
Phone: [phone] Fax: [phone] Web: www.excelics.com
Revised November 2005