EPA120E-CP083 Datasheet, PDF (1/1 Pages) Excelics Semiconductor, Inc. – High Efficiency Heterojunction Power FET

UPDATED 02/15/2005
EPA120E-CP083
High Efficiency Heterojunction Power FET
FEATURES
• NON-HERMETIC SURFACE MOUNT
160MIL METAL CERAMIC PACKAGE
• +29 dBm OUTPUT POWER AT 1dB COMPRESSION
• 19.5 dB GAIN AT 2 GHz
• 0.3x1200 MICRON RECESSED “MUSHROOM” GATE
• Si₃N₄ PASSIVATION
• ADVANCED EPITAXIAL DOPING PROFILE PROVIDES
HIGH POWER EFFICIENCY, LINEARITY AND RELIABILITY
All Dimensions in mil
Tolerance: ± 3 mil
ELECTRICAL CHARACTERISTICS (T_a = 25°C)
Caution! ESD sensitive device.
SYMBOL
PARAMETER/TEST CONDITIONS
MIN TYP MAX UNITS
P_1dB
G_1dB
PAE
I_DSS
Output Power at 1dB Compression
f = 2.0 GHz
27.5 29.0
Vds = 8 V, Ids=50% Idss
f = 12.0 GHz
29.0
Gain at 1dB Compression
f = 2.0 GHz
18.0 19.5
Vds = 8 V, Ids=50% Idss
f = 12.0 GHz
7.0
Power Added Efficiency at 1dB Compression
Vds = 8 V, Ids=50% Idss
f = 2.0 GHz
43
dBm
dB
%
Saturated Drain Current
V_DS = 3 V, V_GS = 0 V
210
360
510
mA
G_M
Transconductance
V_DS = 3 V, V_GS = 0 V
240
380
mS
V_P
Pinch-off Voltage
V_DS = 3 V, I_DS = 3.5 mA
-1.0
-2.5
V
BV_GD
Drain Breakdown Voltage
I_GD = 1.2 mA
-13
-15
V
BV_GS
Source Breakdown Voltage
I_GS = 1.2 mA
-7
-14
R_TH*
Thermal Resistance
40
Notes: * Overall Rth depends on case mounting.
ABSOLUTE MAXIMUM RATINGS FOR CONTINUOUS OPERATION^1,2
SYMBOL
CHARACTERISTIC
VALUE
V_DS
Drain to Source Voltage
8V
V_GS
Gate to Source Voltage
-3 V
I_DS
Drain Current
405 mA
I_GSF
Forward Gate Current
10 mA
P_IN
Input Power
@ 3dB compression
P_T
Total Power Dissipation
3.8 W
T_CH
Channel Temperature
150°C
T_STG
Storage Temperature
-65/+150°C
Note: 1. Exceeding any of the above ratings may result in permanent damage.
2. Exceeding any of the above ratings may reduce MTTF below design goals.
V
o_C/W
Specifications are subject to change without notice.
Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085
Phone: [phone] Fax: [phone] Web: www.excelics.com
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Revised February 2005