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EPA120D-CP083 Datasheet, PDF (1/1 Pages) Excelics Semiconductor, Inc. – High Efficiency Heterojunction Power FET
UPDATED 01/13/2006
EPA120D-CP083
High Efficiency Heterojunction Power FET
FEATURES
• NON-HERMETIC SURFACE MOUNT
160MIL METAL CERAMIC PACKAGE
• +29 dBm OUTPUT POWER AT 1dB COMPRESSION
• 18.0 dB GAIN AT 2 GHz
• 0.5x1200 MICRON RECESSED “MUSHROOM” GATE
• Si3N4 PASSIVATION
• ADVANCED EPITAXIAL DOPING PROFILE PROVIDES
HIGH POWER EFFICIENCY, LINEARITY AND RELIABILITY
ELECTRICAL CHARACTERISTICS (Ta = 25°C)
SYMBOL
PARAMETER/TEST CONDITIONS
P1dB
G1dB
PAE
IDSS
Output Power at 1dB Compression
f = 2.0 GHz
Vds = 8 V, Ids=50% Idss
f = 4.0 GHz
Gain at 1dB Compression
f = 2.0 GHz
Vds = 8 V, Ids=50% Idss
f = 4.0 GHz
Power Added Efficiency at 1dB Compression
Vds = 8 V, Ids=50% Idss
f = 2.0 GHz
Saturated Drain Current
VDS = 3 V, VGS = 0 V
GM
Transconductance
VDS = 3 V, VGS = 0 V
VP
Pinch-off Voltage
VDS = 3 V, IDS = 3.6 mA
BVGD
Drain Breakdown Voltage
IGD = 1.2 mA
BVGS
Source Breakdown Voltage
IGS = 1.2 mA
RTH*
Thermal Resistance
Notes: * Overall Rth depends on case mounting.
MAXIMUM RATINGS AT 25OC
SYMBOLS
PARAMETERS
Vds
Drain-Source Voltage
Vgs
Gate-Source Voltage
Igsf
Forward Gate Current
Igsr
Reserve Gate Current
Pin
Input Power
Tch
Channel Temperature
Tstg
Storage Temperature
Pt
Total Power Dissipation
Note: 1. Exceeding any of the above ratings may result in permanent damage.
2. Exceeding any of the above ratings may reduce MTTF below design goals.
ABSOLUTE1
12V
-5V
5.4 mA
0.9 mA
26 dBm
175oC
-65/175oC
3.0 W
All Dimensions in mil
Tolerance: ± 3 mil
Caution! ESD sensitive device.
MIN TYP MAX UNITS
27.5 29.0
29.0
16.5 18.0
13.0
dBm
dB
44
%
210
360
510
mA
240
380
mS
-1.0
-2.5
V
-13
-15
V
-7
-14
V
45
50
oC/W
CONTINUOUS2
8V
-3V
1.8 mA
0.3 mA
@ 3dB Compression
175oC
-65/175oC
3.0 W
Specifications are subject to change without notice.
Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085
Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com
page 1 of 1
Revised January 2006