EPA030C-70 Datasheet, PDF (1/1 Pages) Excelics Semiconductor, Inc. – High Efficiency Heterojunction Power FET

UPDATED 01/06/2005
EPA030C-70
High Efficiency Heterojunction Power FET
FEATURES
• NON-HERMETIC LOW COST CERAMIC 70MIL PACKAGE
• +22.0 dBm OUTPUT POWER AT 1dB COMPRESSION
• 8.0 dB POWER GAIN AT 18GHz
• 0.3 x 300 MICRON RECESSED “MUSHROOM” GATE
• Si₃N₄ PASSIVATION
• ADVANCED EPITAXIAL HETEROJUNCTION PROFILE
PROVICES EXTRA HIGH POWER EFFICIENCY AND
HIGH RELIABILITY
• Idss SORTED IN 10mA PER BIN RANGE
ELECTRICAL CHARACTERISTICS (T_a = 25°C)
SYMBOL
PARAMETERS/TEST CONDITIONS¹
P_1dB
Output Power at 1dB Compression
V_DS = 6V, I_DS ≈ 50% I_DSS
f = 12GHz
f = 18GHz
G_1dB
Gain at 1dB Compression
V_DS = 6V, I_DS ≈ 50% I_DSS
f = 12GHz
f = 18GHz
PAE
Power Added Efficiency at 1dB Compression
V_DS = 6V, I_DS ≈ 50% I_DSS
f = 12GHz
I_DSS
Saturated Drain Current
V_DS = 3 V, V_GS = 0 V
G_M
Transconductance
V_DS = 3 V, V_GS = 0 V
V_P
Pinch-off Voltage
V_DS = 3 V, I_DS = 1.0 mA
BV_GD
Drain Breakdown Voltage
I_GD = 1.0mA
BV_GS
Source Breakdown Voltage I_GS = 1.0mA
R_TH
Thermal Resistance
Notes: * Overall Rth depends on case mounting.
Caution! ESD sensitive device.
MIN TYP MAX UNITS
19.5 22.0
dBm
22.0
9.5 11.5
dB
8.0
45
%
50
90
130
mA
60
95
mS
-1.0 -2.5
V
-11
-15
V
-7
-14
310*
V
o_C/W
MAXIMUM RATINGS AT 25^OC
SYMBOL
PARAMETERS
ABSOLUTE¹
CONTINUOURS²
V_DS
Drain to Source Voltage
10 V
V_GS
Gate to Source Voltage
-6 V
I_DS
Drain Current
Idss
I_GSF
Forward Gate Current
15 mA
P_IN
Input Power
19 dBm
T_CH
Channel Temperature
175°C
T_STG
Storage Temperature
-65/+175°C
P_T
Total Power Dissipation
440mW
Note: 1. Exceeding any of the above ratings may result in permanent damage.
2. Exceeding any of the above ratings may reduce MTTF below design goals.
6V
-3 V
65 mA
2.5 mA
@ 3dB compression
150°C
-65/+150°C
370mW
Specifications are subject to change without notice.
Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085
Phone: [phone] Fax: [phone] Web: www.excelics.com
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Revised January 2005